The present invention relates to integrated circuit structures and particularly to integrated capacitors having corrugated electrodes.
One of the driving factors in DRAM integration is obtaining an adequate amount of capacitance per unit cell, while the dimensions of the unit cells steadily decrease. As sensing and selection circuits are refined, the required capacitance value has decreased slightly, but it is still highly desirable to obtain a capacitance of at least 30 fF per cell, and more if possible. As integrated circuit dimensions continually shrink, this becomes more and more difficult.
In addition, capacitors for other purposes in integrated circuits are subject to the constraints of density, like any other integrated circuit function. Thus capacitors used for processing image data, for analog filtering, or for low pass filtering may all require capacitances which are relatively large at the capacitances per unit area (specific capacitance) normally attainable in integrated circuits.
Conventionally, DRAM capacitors will often use a vertically extended capacitor. For example, a capacitor which uses a cylindrical shape can be extended upwards to achieve a capacitor plate area of approximately 2xcfx80hr, where r is the radius, and h is the height. (An example of such a conventional inner electrode 1210 is shown in FIG. 12.) Similarly, some quasi-cylindrical capacitors have been fabricated which include capacitor dielectric, enhanced active capacitor area, both on the interior and exterior surfaces of a cylindrical capacitor shape. Other capacitors have even used nested cylinders. However, all of these attempts run into some geometrical limitations. Examples of other capacitor geometries for the inner electrode 1210 are depicted in FIGS. 11 and 13.
Another attempt in the prior art is known as the corrugated capacitor cell DRAM. See H. Sunami et al., A Corrugated Capacitor Cell (CCC) for Megabit Dynamic MOS Memories, 4 IEEE Electron Device Letters 90-91 (1983) which is hereby incorporated by reference. This cell used an angular trench, to increase capacitance due to the electric field enhancement at the capacitor electrode structure.
Real capacitors are typically not infinite planes, but include corners or edges. At such corners and edges, the electric field, for given applied voltage, maybe enhanced by geometric effect. (For example, if the uniform voltage is supplied to a sharp needle, the electric field will highest at the tip of the sharp needle.) For further discussion of geometry dependent field enhancement see Betty Prince, SEMICONDUCTOR MEMORIES: A HANDBOOK OF DESIGN, MANUFACTURE, AND APPLICATION 626-27 (2nd ed. 1991) which is hereby incorporated by reference.
Background: Increasing Effective Capacitance by Use of Geometric Effect
One way to use the electric field enhancement effect described above is to increase the capacitance of a capacitor. For example, the corrugated capacitor DRAM cell mentioned above is one example of this. Another example is the use of hemispherical polysilicon (HSP) structures as DRAM cells. In this technology, a layer of amorphous silicon is annealed in a way which causes it to form nodules. (The nodules are approximately hemispherical under very high magnification, which gives the name to this process.) Thus the surface area of the capacitor is intentionally roughened. This provides an increased effective surface area for the capacitor, and the effective capacitance is enhanced by a factor of 1.5 to 2.
Integrated Capacitor with Horizontal Corrugations
The present application describes a novel type of integrated capacitor, in which lateral selective etching is used to achieve a finned or corrugated structure. Preferably a multi-layered structure is used at the starting point so the fins of the etched structure have an extremely small minimum dimension. For example, in one sample class of embodiments, the as deposited layers are successively amorphous and polycrystalline. (In one class of embodiments, this can be achieved in a single deposition run, simply by varying the temperature or other deposition parameters.) After selective etching occurs, an anneal will then cause the amorphous materials to become polycrystalline, so that the composition of the material is substantially uniform, although the corrugated surface contour has been achieved. The corrugated surface contour provides not only a larger total surface area, but also provides electric field enhancement at edge locations. Thus the structure advantageously provides increased capacitance for a given unit area and a given minimum patterning geometry. This is expected to be advantageous not only for DRAMs, but also for other integrated circuit capacitor structures.